Vision Processing using NXP S32V234 Processor

Available On Demand until November 14, 2018

NXP offers a complimentary software platform called S32 Design Studio IDE for Vision that allows users to build automotive and industrial vision applications.

During this Webinar, you will learn how the comprehensive Vision Software Development Kit (VSDK) for NXP S32V234 Vision Processor will help you with your vision processing applications. The VSDK includes an image sensor processor (ISP) and APEX graph tools. The S32V234 Vision Processor targets surround view, object detection, CNN/DNN neural networks for image classification and sensor fusion applications in Automotive and Industrial markets.


S32V234 features Quad A53 v8 cores, a M4 core, a 3D GPU, dual APEX vision accelerator cores, integrated ISP, PCIe, Gigabit Ethernet, encryption security and supports up to ASIL-C functional safety. The VSDK software features documented source code and is free of charge. In addition, the VSDK offers built in pre-compiled code example projects, such as surround view, CNN classification, object detection, facial recognition, etc...


During this 45-minute webinar NXP will introduce the S32V234 Vision Processor and you will learn how projects can be created using NXP’s no-cost S32 Design Studio IDE software with integrated VSDK and ISP/APEX graphical design tools.


Join to learn more and start your design right away!


Speakers:



Philip Pesses, Technical Marketing Engineer, Automotive Microcontrollers and Processors Group, NXP

Philip Pesses is a Technical Marketing Engineer in the NXP Automotive Microcontroller and Processor (AMP) division. He holds a BSEE from the University of Texas at Austin. He has worked in multiple automotive areas such as powertrain/HEV product management to distribution business development and is based in Austin, TX.




Kushal Shah, Systems and Applications Engineer, Automotive Microcontrollers and Processors Group, NXP

Kushal Shah is Systems and Applications Engineer for Automotive Microcontrollers and Processors Group at NXP. His interest lies in the high-performance computing and machine learning. He holds a Master of Science degree in computer engineering from University of California Riverside and a bachelor of engineering in Electronics from The M. S. University of Baroda.



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