Solid State Technology Webcast
Mon, Sep 30, 2013 11:00 AM EDT
Packaging technology is driven by a combination of cost, performance, form factor and reliability. This webcast will examine new advances in conventional back-end packaging, including wafer bumping and copper wire bonding, as well as the role of new 2.5D and 3D integration. Presenters will focus on isssues related to cost, performance (speed, power and noise immunity), form factor (thickness, weight, PCB area consumption), and testability, as well as the tradeoff of technical maturity versus risk in high-volume manufacturing.
webcast will also include new information on the Hybrid Memory
Cube, a three-dimensional structure with a logic device at its
base and a plurality of DRAMs vertically stacked above it using
through-silicon via (TSV) connections.